This invention relates to a test control device designed to be connected to a plurality of integrated circuits each having an interface provided for the receipt and transmission of test data for verifying that the respective integrated circuit is functioning correctly.
The trend towards increasing functionality of integrated circuits has made testing of the devices by conventional techniques ever more difficult and it has been felt desirable to provide such devices with some means of testing whilst in situ. The Joint Test Action Group (JTAG) of Europe and North America has proposed a suitable architecture which has been incorporated into IEEE standard 1149.1.